[New Graduate/Experienced] Hardware Engineer (Master's/PhD)
FuriosaAI · Seoul, South Korea
$78k - $119k
Full-Time
Job description
About the Role
FuriosaAI is recruiting entry-level Hardware Engineers with master's or doctoral degrees to join the development of next-generation NPUs. Depending on major and capabilities, successful candidates will be placed in suitable areas such as Architecture, SoC Design, Design Verification, and Interface.
Key Responsibilities
Architecture Engineer - Define the core architecture and computational structure of the NPU and verify performance.
Design NPU cores by analyzing the latest LLM computation patterns
Analyze area, performance, and accuracy trade-offs by developing performance models and cycle-level simulators
Design an integrated HW/SW execution model in close collaboration with the compiler team
Recommended background: computer architecture, performance modeling and simulator implementation, and deep learning model structure analysis
SoC Design Engineer - Responsible for designing the entire chip SoC including the NPU, and the NoC.
Integrate PE, CPU, and memory controllers and design on-chip network (NoC) and AXI interconnect
Power/clock domain distribution, establishment of large-scale SRAM strategy, and application of memory compilers
Implement DFT/MBIST, RAS (reliability, availability, serviceability), and fault handling architectures
Recommended background: RTL design (Verilog/SystemVerilog, Chisel), NoC and bus protocols
Interface Design Engineer - Design ultra-high-speed data communication paths and interfaces that connect the chip to external systems.
Develop D2D (Die-to-Die), PCIe, and proprietary scale-up Ethernet interconnect
Integrate and optimize HBM4 memory controllers
SI/PI analysis and rack-scale architecture design, ensuring system reliability (BER/FIT)
Recommended background: high-speed serial interfaces, network/communication protocols, signal processing, error correction, and reliability analysis
Verification Engineer RTL - Prove the functional integrity of designs and achieve complete coverage.
Establish specification-based verification plans and build UVM-based verification environments (block to chip level)
Verify complex corner cases through assertion-based verification and formal verification
Verification through emulators and FPGAs
Recommended background: SystemVerilog/UVM, formal methods, programming (Python, Rust, Scala, etc.)
Minimum Qualifications
Holder of a master's or doctoral degree in electrical engineering, computer engineering, or a related field
Experience in RTL design or verification based on Verilog/SystemVerilog (including research and projects)
Experience using scripting languages such as Python, TCL, and Shell
Preferred Qualifications
Experience in chip design, tape-out, or FPGA implementation
Research experience related to accelerators, processors, or memory hierarchy
Understanding of high-speed interfaces such as AMBA, CDC, UVM, PCIe/UCIe/HBM
Experience implementing C++-based simulators or PPA modeling
Experience with Chisel and RISC-V
Why Join FuriosaAI
The defining bottleneck of the AI era is building the right hardware and software stack to run it at global scale. Furiosa is solving this challenge holistically from the ground up.
With our flagship chip, RNGD, in mass production today and our next-generation platform in development with Broadcom, we are proving that full-stack, tensor-native compute is the future of AI infrastructure. This is a pivotal moment to join our team, right as we accelerate our global expansion.
At Furiosa, you will:
Solve AI’s Most Urgent Challenge. Help build the high-performance, energy-efficient inference hardware and software required to fulfill the promise of advanced AI.
Pioneer Full-Stack Co-Design. Work with teams that are architecting solutions from silicon up through the compiler (featuring innovations like Tensor Contraction Language and Virtual ISA) and serving frameworks.
Ship Real-World Silicon, Software, and Solutions. Turn breakthrough technology into commercial deployment. RNGD is in mass production with TSMC and running live enterprise workloads for global leaders like LG AI Research and Samsung SDS.
Partner With the Industry's Best. Collaborate across an elite global ecosystem that includes TSMC, Broadcom, SK Hynix, and GUC.
Do Your Life’s Best Work. Join a brilliant, low-ego, mission-driven team in a high-trust environment that values autonomy, intellectual curiosity, and shared ambition.